Former Intel CEO Patrick Gelsinger expressed support for Nagare Labs and its Z2RAM technology, stating the memory aims to combine the best attributes of SRAM, DRAM, and flash memory to potentially challenge High Bandwidth Memory (HBM) in terms of density, speed, and power. Gelsinger shared his assessment with The Register, noting that Z2RAM is designed to be integrated directly onto the logic chip, which reduces data travel distance. The three memory types discussed—DRAM, SRAM, and NAND—each serve distinct roles in computing systems.
DRAM functions as the main memory for CPUs or GPUs, holding data immediately before processing. SRAM acts as cache memory, situated near the processing chip for data loading. NAND chips, conversely, function as primary storage devices. While scaling for DRAM and NAND has shown progress, SRAM scaling has encountered bottlenecks, partly due to its cell design requiring six transistors, where shrinking transistors introduces leakage current and material impurities.
In contrast, Nagare Labs' Z2RAM seeks to overcome these limitations by integrating directly onto the logic die, thereby achieving the high-speed, low-latency benefits associated with SRAM while also stacking the memory vertically to conserve horizontal surface area, offering an alternative to the SRAM scaling constraints that affect AI chip area. Nagare's co-founder, Suman Datta, stated that the Z2RAM removes the traditional capacitor used in the 1 Transistor-1 Capacitor (1T1C) memory design, instead relying on "the gate capacitance of the second transistor to store the charge." Playground Global, an investment firm associated with Gelsinger, is investing in Nagare.
Gelsinger compared Z2RAM favorably to HBM, asserting that "while HBM has many limitations (power, density, shoreline bandwidth) the combination of its density and performance is the best available today. This is exactly the value that Z2RAM brings, giving better density, speed and power."
